In recent years, various systems have a direct memory access (DMA) transfer function that performs data transfer between memories or between a memory and a peripheral circuit without involvement of a central processing unit (CPU).
For example, a DMA control device (DMA controller (DMAC)) is built into a micro controller unit (MCU) in conjunction with a CPU (CPU core), a memory, a peripheral circuit, and so on. The memory is implemented by, for example, a static random-access memory (SRAM).
In addition, for example, the MCU has a scatter-gather mode in which, during DMA transfer, data can be gathered and sequentially transferred to scattered memory blocks.
There has been proposed a method in which a scatter-gather mode and functions in which various signals can be used as a trigger signal for starting a task executed in the scatter-gather mode are combined to control peripheral circuits without operating a CPU.
Various DMA control technologies have been proposed heretofore.
Examples of related technologies are disclosed in Japanese Laid-open Patent Publication No. 06-060013, Japanese Laid-open Patent Publication No. 2003-058491, and Japanese Laid-open Patent Publication No. 2011-070372.
As described above, there has been proposed a method for controlling peripheral circuits in a scatter-gather mode without operating a CPU. This peripheral circuit control is performed through writing to and reading from registers included in the peripheral circuits.
In general, however, since the addresses in the registers may be discontiguous, for example, the DMAC executes writing to or reading from each register as one task. Consequently, the number of processing cycles increases, leading to an increase in the power consumption.
Also, in order to increase the efficiency of a plurality of accesses involving the DMAC to discontiguous addresses, it is conceivable to execute writing or reading as one task by using a reference address and a relative address. However, when a task of performing writing to or reading from a register only once is executed, which task is frequently performed during operation of a peripheral circuit, it is difficult to reduce the number of processing cycles.